Design modified architecture for MCS-51 with innovated instructions based on VHDL

(in lingua inglese)

This paper presented two innovated macro operations based on conventional famous Intel CISC MCS-51 lCs family over the FPGA technique, the two modified instructions able to meet widely application domains, without any conflict with the main lC’s ISA and its characteristics. The first instruction ‘‘MOVBK Adr2, Adr1’’ was designed for transferring set of eight data bytes starting from lC’s consequence memory locations ‘‘Adr1’’ to others eight consequence memory locations starting from ‘‘Adr2’’, and the second instruction ‘‘GetMAX Adr’’ was designed for getting the maximum data bytes for set of eight data bytes starting from lC’s memory location ‘‘Adr’’.